A computer chip small enough to fit in the palm of your hand could soon give NASA's spacecraft something they have never truly had: the ability to think for themselves. The agency's High Performance Spaceflight Computing (HPSC) processor, now undergoing rigorous testing at the Jet Propulsion Laboratory in Southern California, is delivering performance levels up to 500 times greater than the processors currently flying on NASA missions.
"Building on the legacy of previous space processors, this new multicore system is fault-tolerant, flexible, and extremely high-performing," said Eugene Schwanbeck, program element manager in NASA's Game Changing Development program at the agency's Langley Research Center. "NASA's commitment to advancing spaceflight computing is a triumph of technical achievement and collaboration."
The leap in capability is not just impressive on paper — it addresses a genuine bottleneck in space exploration. Current spacecraft rely on processors that are decades old in design, chosen not for speed but for their proven ability to survive the harsh radiation environment beyond Earth's protective magnetosphere. High-energy particles from the Sun and cosmic rays can flip individual bits in a computer's memory, sometimes forcing spacecraft into safe mode until ground controllers diagnose and fix the problem.
The HPSC chip is a radiation-hardened system-on-a-chip (SoC) that includes central processing units, computational offloads, networking units, memory, and input/output interfaces — all on a single piece of silicon. Built in partnership with Microchip Technology under a contract awarded in 2022, the processor is designed to survive intense radiation, violent launch vibrations, and the extreme temperature swings of space while delivering computing power that opens entirely new possibilities for mission design.
Among the most transformative applications is autonomous decision-making. When a spacecraft is exploring Mars, commands from Earth take between 4 and 24 minutes to arrive, depending on the planets' relative positions. For a rover navigating a boulder field or a lander descending to an icy moon, that delay can be the difference between a successful maneuver and a mission-ending collision. The HPSC processor would give spacecraft enough onboard intelligence to assess situations and respond in real time without waiting for instructions from home.
JPL engineers have been putting the chip through what project manager Jim Butler calls "the wringer" — radiation bombardment, thermal cycling, mechanical shock tests, and high-fidelity landing simulations drawn from real NASA missions. The team even celebrated a symbolic milestone in February 2026 when they sent a "Hello Universe" message through the processor, echoing the early tradition of testing new computing systems with a simple greeting.
The chip's potential applications extend well beyond robotic explorers. NASA envisions using the HPSC processor in future crewed habitats on the Moon and Mars, where powerful onboard computing will be essential for life-support monitoring, scientific data analysis, and communications management. It could also accelerate the rate of scientific discovery by enabling spacecraft to analyze, compress, and transmit data far more efficiently than current systems allow.
For an agency preparing to return humans to the Moon through the Artemis program and eyeing crewed missions to Mars within the next two decades, a smarter spacecraft computer is not a luxury — it is a necessity. With HPSC, the next generation of explorers, both human and robotic, will carry a brain worthy of the journey.
